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Mark Hahn's avatar

Have they published their ISA? I wonder if the approach is scalable to very different contexts, like some future PIM system that consists of just a big array of smart-dimms on some sort of switched fabric.

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Erik Stubblebine's avatar

When I hear about compile-time resolution (vs. runtime resolution) it makes me think about the insanity of what was Intel Itanium...

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Joe Murphy's avatar

Part of what made Itanium such an absurd proposition was the state of compilers at the time though. Remember this was well before LLVM came along and all the ideas associated with it, like a high quality IR, etc.

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Ian Schmidt's avatar

Itanium's big problem was that it's VLIW. Compilers have gotten a lot better at data parallelization (auto-vectoring and SIMD) but instruction parallelization hasn't advanced that much from those days. Details are still scarce, but as described this chip sounds more like an FPGA, and tooling for FPGAs is pretty mature.

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Pawel Kraszewski's avatar

Suspiciously similar to the "systolic computers" idea I was taught on my studies 30 years ago and which was first published 46 years ago...

https://en.wikipedia.org/wiki/Systolic_array

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Kapil's avatar

Do we need to write new compiler for example running C# dotnet?

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Mark's avatar

I would forego Doom at the moment and just focus on embedded apps like a CO Detector, Wireless Sensor, or even a Volt-Ohm-Milliamp meter.

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defdefred's avatar

How to disable this horrible auto translated audio!!!

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Cyberneticist's avatar

🤯

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